KNA-DV3100/DV3200
5
MICROCOMPUTER'S TERMINAL DESCRIPTION
MICROCOMPUTER : MB89935B (NAVI BOARD : IC106)
Pin No. Pin Name I/O
Function
Processing Operation Description
1
P04
O
FRES output
Lo : Flash ROM and CORE1 reset
2
P05
O
RES output
Lo : System reset
3
P06
O
NMI output
Interrupt output to CORE1
4
P07
I
Not used (Pull down to GND line)
5
MODE0
I
Mode input 0
Lo Fixed (Connect to GND Line)
6
MODE1
I
Mode input 1
Lo Fixed (Connect to GND Line)
7
RST#
I
Reset input
Lo : At the time when system is down and when panel reset SW is pressed
8X0-
Clock oscillator terminal
9X1-
Clock oscillator terminal
10
VSS
-
GND connection terminal
Connect to GND line
11
P37
O
P ON terminal
Hi : Turning power ON for SW's system power circuit
12
P36
I
WDP input
Detection of watchdog pulse from CORE1
Normal operation : Logic is reversed within 300ms
13
P35
I
ACC detection input
Hi : ACC ON
14
P34
I
BU detection input
Hi : BU ON
15
P33
I
SDRAM clock enable input
Lo : Self-refresh of SDRAM, Hi : Normal operation of SDRAM
16
C
-
C connection terminal
(0.1
µF)
17
P32
I
Not used (Pull down to GND line)
18
P31
I
Delayed ACC input
Hi : CORE1 in operation and panel mechanism in operation when ACC is OFF
19
P30
O
ACC detection output
Hi : Power ON, Lo : Power OFF (Output to CORE1 and system computer)
20
P50
O
Backup operation complete notice
Hi : SDRAM CKE core in control, Lo : Backup processing complete
21
AVSS
-
GND connection terminal
Connect to GND line
22
P40
O
V33D switching output
Lo : Normal (ACC ON)
23
P41
O
V33D switching output
Lo : At the time of backup
24
P42
O
Mute output
Lo : Mute
25
P43
I
V33 monitor input
Lo : No Output
26
P00
I
VMAIN monitor input
Lo : No Output
27
P01
I
BU monitor input
Lo : No BU
28
P02
I
V50 output monitor input
Lo : No Output
29
P03
I
V80 output monitor input
Lo : No Output
30
VCC
-
Positive power supply terminal
Connect to 3.3V line backup
